Lab C: Adding Additional Branch, Shift and I-Type Instructions to the Data Path Simulator, PathSim
Goal:
With the conclusion of this lab, you will extend the data path simulator so that the additional branch bne and the I-type instructions addi, andi, ori, and xori will execute. The assembler is already written to handle these instructions; your assignment for this lab exercise is to write java code that adds functionality to the Control unit, the ALU and the ALUControl unit.
Files Pertaining to the Lab Project:
You will need, in addition to this document and the data path simulator PathSim, the java and archive (jar and zip) files found in the folder PathSim\SuggestedLabExercises\LabC\Extensions.
Steps:
3. Whenever you have completed a segment of code and want to test your work, EXPORT the three classes ExtendedALU, ExtendedALUControl and ExtendedControlUnit into a jar file. The jar file MUST be given the name Extensions.jar. Replace the jar file Extensions.jar in the folder PathSim\DataPathSimulator with the one you have created. You can now run the data path simulator and test your implementations of the new operators by opening PathSim.html with your browser. You must also construct a test suite for testing your extensions.
Any one or more of the following instructions are to be handled by the data path simulator PathSim.
addi rt, rs, imm Add the sign-extended imm and rs, storing the result in rt
|
0x08 |
rs |
rt |
imm |
Use 3 for the ALUOp signal that the Control Unit sends to the Alu Control Unit
andi rt, rs, imm And the zero-extended imm with rs, storing the result in rt
|
0x0C |
rs |
rt |
imm |
Use 4 for the ALUOp signal that the Control Unit sends to the Alu Control Unit
ori rt, rs, imm Or the zero-extended imm with rs, storing the result in rt
|
0x0D |
rs |
rt |
imm |
Use 5 for the ALUOp signal that the Control Unit sends to the Alu Control Unit
xori rt, rs, imm Xor the zero-extended imm with rs, storing the result in rt
|
0x0E |
rs |
rt |
imm |
Use 6 for the ALUOp signal that the Control Unit sends to the Alu Control Unit
Note: The sign-extended value of imm is available to the ALU on the second data input line. But the specifications for andi, ori and xori require the zero-extended value. Although the simple data path architecture does not directly support this specification, we can extend the software to handle it provided that we use for imm only values in which the most significant bit is 0. This does not take care of the problem for those cases when the most significant bit of imm must be 1. As an interesting side question, how would you extend the data path (hardware) to support the immediate operations andi, ori and xori?
bne rt, rs, offset branch the number of instructions given by offset
if rs is not equal to rt
|
0x05 |
rs |
rt |
offset |
Use 7 for the ALUOp signal that the Control Unit sends to the Alu Control Unit
Also, use A for the ALUControl signal sent to the ALU from the Alu Control Unit
Note: Observe, if not already, that in the simple data path architecture the PC has already been incremented when a branch instruction is executed. Therefore, the description given above is not consistent with what occurs in the simple data path architecture. For example, if we want to branch around the next instruction, the offset must be 1 word and not 2. A similar statement can be made for branching back.
Next, observe, if not already, that the zero line coming from the ALU in the simple data path architecture is used in executing a branch instruction. Further, the value on the line is set according to the result of an operation carried out in the ALU. For example, zero is set to 1 when subtracting two numbers that are equal and have a difference of zero. This is exactly what is needed when executing the beq branch instruction. Now to execute the bne branch instruction without changing the architecture you may need to write a “hack” into the ALU software component. Although this is inconsistent to good design, the exercise is given here to “exercise” your understanding of the simple data path architecture.